This file is raw output from pdftotext and may not be ideal for distribution. If you are a maintainer for Hackipedia, please sit down when you have time and clean this text version up. Source PDF: /mnt/fw-js/docs/Hardware/Other, misc/Emulating Data EEPROM for PIC18 and PIC24 Microcontrollers and DsPIC Digital Signal Controllers.pdf Like all conversions the text below should be fully readable as UTF-8 unicode text. --------------------------------------------------------------- AN1095 Emulating Data EEPROM for PIC18 and PIC24 Microcontrollers and dsPIC® Digital Signal Controllers Packed Page – The new current page after the pack Author: David Otten and routine is complete. Stephen Cowden Microchip Technology Inc. Page Status – Program memory location(s) at the beginning of the current page that stores data EEPROM emulation status. The PIC18 implementation INTRODUCTION uses two locations and the PIC24/dsPIC33F uses one. Microchip Technology has expanded its product portfolio to include a wide variety of cost-effective PIC® THEORY OF OPERATION microcontrollers without an internal data EEPROM. This application note’s algorithm supports a selectable, Many applications store nonvolatile information in the emulated data EEPROM size of up to 255 locations. Flash program memory using table write and read The address range is between 0 and the size of the operations. Applications that need to frequently update emulated data EEPROM minus one. For example, if this data may have greater endurance requirements the implemented size of data EEPROM is five, only the than the specified Flash endurance for the device. addresses between 0 and 4 are available. The alternate solution of using an external, Note: Data EE address, 0xFF, is reserved and serial EEPROM device may not be appropriate for indicates an available location in program cost-sensitive or pin-constrained applications. memory. This application note presents a third alternative that For the PIC18 implementation, data is 8 bits and for addresses these issues. This algorithm features an PIC24/dsPIC33F, data is 16 bits. Due to architectural interface similar to an internal data EEPROM, uses differences of the program memory, the emulated data available program memory and can improve EEPROM information is stored differently for 8-bit and endurance by a factor as high as 500. 16-bit implementations. For these formats, see Table 1 Note: To use this solution, the device must have and Table 2. word write capability. Refer to the specific device data sheet to verify this feature is TABLE 1: PIC18 DATA EEPROM available. INFORMATION FORMAT IN PROGRAM MEMORY Definition of Terms Bits 15-8 Bits 7-0 Page – The minimum amount of program memory affected by an erase operation. Data EE Data Data EE Address Row – The maximum amount of program memory TABLE 2: PIC24/dsPIC33F DATA EEPROM affected by a programming operation. INFORMATION FORMAT IN Erase/Write Cycle – The number of erase and write PROGRAM MEMORY operation pairs. Bits 23-16 Bits 15-0 Endurance – A specification indicating the maximum number of erase/write cycles and associated conditions. Data EE Address Data EE Data Retention – A specification indicating the minimum The algorithm takes advantage of the PIC length of time and associated conditions for the microcontroller’s ability to self-program a single retention of data in Flash memory. location of program memory. This location is an 8-bit Effective Endurance – The improved endurance of the operation for PIC18 and either an 8 or 16-bit operation emulated data EEPROM as a result of using an for PIC24 and dsPIC33F, depending on whether an odd efficient programming algorithm. or even address is being written, respectively. Current (Active) Page – A page in program memory Note: For more information on program memory that is being written and read by the data EEPROM organization, refer to the applicable emulation algorithm. product data sheet. © 2007 Microchip Technology Inc. DS01095A-page 1 AN1095 PIC24/dsPIC33F Scenario In this example, data EEPROM address 0x7 is written to 0x0707, 0x2 is updated to 0x2222 and address 0xA To better understand how the algorithm works, here is is written to 0x0A0A. a simple scenario for the PIC24 and dsPIC33F. In Table 7, the last location in the page is written with a After the first page has been initialized, the first location rewrite to address 0x7 to 0x7777. Since the currently is reserved for the page status information. This indi- active page is now full, the data EEPROM information cates whether a page is active or expired and how will move to the next available page. This new page is many erase/write cycles have been performed. This referred to as the packed page. The pack routine information is not directly accessible by the user, but is performs this task. Since only the most current data for used by the algorithm to find available pages and each data EEPROM address is needed, the amount of update status flags. This page is designated as information decreases. After the data is moved, this the current or active page. page is designated as the current page. If the current In this example, a write operation has been performed page has incremented through all allocated pages in to store a data value of 0x0202 to data EEPROM program memory, the erase/write count is incremented address, 0x2. As shown in Table 3, this information is as shown in Table 8. The page is now ready to store stored in the first available location in the page. As more information via write operations. more writes are performed, the algorithm continues to The PIC18 algorithm works in a similar way, but instead write the information in a similar fashion, as shown in of reserving one location of program memory for page Table 4 through Table 6. status information, two locations are used. Also, 8-bit data is stored instead of 16-bit data. TABLE 3: WRITE DATA EEPROM (0x0202,2) TABLE 4: WRITE DATA EEPROM (0x0707,7) Page Address Data EE Address Data EE Data Page Address Data EE Address Data EE Data Page + 0 Page Status<23:16> 0x0000 Page + 0 Page Status<23:16> 0x0001 Page + 2 2 0x0202 Page + 2 2 0x0202 Page + 4 0xFF 0xFFFF Page + 4 7 0x0707 Page + 6 0xFF 0xFFFF Page + 6 0xFF 0xFFFF Page + 8 0xFF 0xFFFF Page + 8 0xFF 0xFFFF . . . . . . Page + 1022 0xFF 0xFFFF Page + 1022 0xFF 0xFFFF TABLE 5: WRITE DATA EEPROM (0x2222,2) TABLE 6: WRITE DATA EEPROM (0x0A0A,0xA) Page Address Data EE Address Data EE Data Page Address Data EE Address Data EE Data Page + 0 Page Status<23:16> 0x0000 Page + 0 Page Status<23:16> 0x0000 Page + 2 2 0x0202 Page + 2 2 0x0202 Page + 4 7 0x0707 Page + 4 7 0x0707 Page + 6 2 0x2222 Page + 6 2 0x2222 Page + 8 0xFF 0xFFFF Page + 8 0xA 0x0A0A . . . . . . Page + 1022 0xFF 0xFFFF Page + 1022 0xFF 0xFFFF TABLE 7: WRITE DATA EEPROM (0x7777,7) TABLE 8: PAGE AFTER PACK OPERATION Page Address Data EE Address Data EE Data Page Address Data EE Address Data EE Data Page + 0 Page Status<23:16> 0x0000 Page + 0 Page Status<23:16> 0x0001 Page + 2 2 0x0202 Page + 4 2 0x2222 Page + 4 7 0x0707 Page + 6 7 0x7777 Page + 6 2 0x2222 Page + 2 0xA 0x0A0A Page + 8 0xA 0x0A0A Page + 8 0xFF 0xFFFF . . . . . . Page + 1022 7 0x7777 Page + 1022 0xFF 0xFFFF DS01095A-page 2 © 2007 Microchip Technology Inc. AN1095 Since each location within the page is programmed • pageCorrupt(0x6) – The page status information once prior to the page erase, only one erase/write cycle was corrupted. The current operation was is consumed for the page. As a result, the algorithm aborted. multiplicatively improves the emulated data EEPROM • writeError(0x7) – The information written into effective endurance. program memory failed verification. The current The previously filled page is erased only after the latest operation was aborted. information has been programmed into the next Status flags differ in severity and how they are serviced. available page and successfully verified. Through this Informational status flags are expected to occur during process, the information is always stored in nonvolatile normal processing and are serviced by simply clearing memory which minimizes the effects of an unexpected the flag with the associated macro. These include: loss of power. addrNotFound, packBeforePageFull and illegalAddress As the program memory page is filled sequentially from flags. beginning to end, the algorithm assumes the most Warning status flags indicate a condition has been current data EEPROM information is the closest exceeded but processing will continue. This includes instance to the end of the page. To simplify the read the expiredPage status flag. With this flag set, the algo- operation, the search begins at the end of the current rithm will attempt to process read and write requests, program memory page and works toward the start of the but the flag will be set after each operation. page – looking for the specified data EEPROM address. The most severe flags are the system error status flags. When a match is found, the associated data is returned These imply either the integrity of the data EEPROM for the first instance of the provided address. If the information has been compromised and/or the algorithm address is not found, the return value of all ones – 0xFF cannot continue until the offending condition has been or 0xFFFF – is returned to emulate the result of an resolved. These include packBeforeInit, pageCorrupt unwritten address in an independent data EEPROM. and writeError flags. To avoid a packBeforeInit event, ensure the initializa- Status Flags tion routine, DataEEInit, is called prior to performing Status flags have been provided to indicate whether an any other emulation routine. Since this routine error or warning condition occurs during the emulation accesses the current state of the emulation process, it process. These indicators are accessed in the will take action only if it is required. Therefore, it can be dataEEFlags register. All flags are active-high. called at any time during data EEPROM emulation. The status bits and return values are defined as The pageCorrupt and writeError flags indicate that a follows: write operation failed to verify and the current operation was aborted. If this occurs, the integrity of the data • addrNotFound(0xFF/0xFFFF) – A read operation EEPROM information has been compromised. No occurred on a previously unwritten data EEPROM further emulation operations should be attempted. The address. only recourse is to erase all of the pages of program • expiredPage(0x1) – The program memory erase/ memory reserved for data EEPROM emulation and write cycle count has exceeded the user-defined attempt to reinitialize them. limit. The algorithm will attempt to execute the Macros are available to retrieve and clear the status write operation. flag values. Status flags are cleared only by the user. • packBeforePageFull(0x2) – The pack routine was No operation is affected by the value of any flag, but the called before the currently active page was full. flag’s value will indicate whether an operation The routine will attempt to move the latest data completed successfully. EEPROM information to the packed page even though the active page is not full. Macros use this naming convention: • packBeforeInit(0x3) – The pack routine was Example macros: “Getx” “Setx y” executed before the initialization routine. The x = Flag name pack operation was aborted. y = Value assigned to flag • packSkipped(0x4) – A page was written beyond All of the flags can be read or cleared in a single the page boundary. This may be a result of the operation using the 8-bit character, dataEEFlags.val. pack routine not being executed properly. The pack operation was aborted. • illegalAddress(0x5) – There was an attempt to write or read with a data EEPROM address equal to or greater than the size of data EEPROM. The read or write operation was aborted. © 2007 Microchip Technology Inc. DS01095A-page 3 AN1095 Page Status These values are used by the algorithm to monitor and control page information and are not directly accessible Each program memory page reserves space for the by the user. Refer to Register 1, Register 2 and page status – using the first two-word locations for the Register 3 for formats of PIC24/dsPIC33F and PIC18 PIC18 implementation or the first location for PIC24/ page status information. dsPIC33F. Status contains information about the page – whether it is expired or active, and the number of erase/write cycles performed. Note: Applications with bootloaders should be careful to not change the page status information. This can be done by programming ‘1’s into these locations. REGISTER 1: PAGE STATUS FOR PIC24 AND dsPIC33F ALGORITHM U-1 U-1 U-1 R-1 R-1 R-1 U-1 U-1 Page Page Page — — — — — Expired Current Available bit 23 bit 16 R-1 R-1 R-1 R-1 R-1 R-1 R-1 R-1 Page Erase/Write Count bit 15 bit 8 R-1 R-1 R-1 R-1 R-1 R-1 R-1 R-1 Page Erase/Write Count bit 7 bit 0 Legend: R = Reserved bit U = Unused bit, read as ‘1’ U = Unused bit, read as ‘1’ -n = Value prior to initialization 1 = Bit is in erased state 0 = Bit is in programmed state bit 23-21 Unimplemented: Read as ‘1’ bit 20 Page Expired 1 = Page not expired 0 = Page expired bit 19 Page Current 1 = Page not current 0 = Page current bit 18 Page Available 1 = Page available 0 = Page not available bit 17-16 Unimplemented: Read as ‘1’ bit 15-0 Page Erase/Write Count: Number of Page Erase/Write Cycles DS01095A-page 4 © 2007 Microchip Technology Inc. AN1095 REGISTER 2: PAGE STATUS FOR PIC18 ALGORITHM (START OF PAGE) U-1 U-1 U-1 U-1 U-1 U-1 U-1 U-1 — — — — — — — — bit 15 bit 8 U-1 U-1 U-1 U-1 U-1 R-1 R-1 R-1 Page Page Page — — — — — Expired Current Available bit 7 bit 0 Legend: R = Reserved bit U = Unused bit, read as ‘1’ U = Unused bit, read as ‘1’ -n = Value prior to initialization 1 = Bit is in erased state 0 = Bit is in programmed state bit 15-3 Unimplemented: Read as ‘1’ bit 2 Page Expired 1 = Page not expired 0 = Page expired bit 1 Page Current 1 = Page not current 0 = Page current bit 0 Page Available 1 = Page available 0 = Page not available REGISTER 3: PAGE STATUS FOR PIC18 ALGORITHM (START OF PAGE + 2) R-1 R-1 R-1 R-1 R-1 R-1 R-1 R-1 Page Erase/Write Count bit 15 bit 8 R-1 R-1 R-1 R-1 R-1 R-1 R-1 R-1 Page Erase/Write Count bit 7 bit 0 Legend: R = Reserved bit U = Unused bit, read as ‘1’ U = Unused bit, read as ‘1’ -n = Value prior to initialization 1 = Bit is in erased state 0 = Bit is in programmed state bit 15-0 Page Erase/Write Count: Number of Page Erase/Write Cycles © 2007 Microchip Technology Inc. DS01095A-page 5 AN1095 INITIALIZATION OPERATION • If two active pages are found, the routine assumes that an unexpected Reset occurred The initialization routine, DataEEInit, must be called during a pack operation. The routine will erase the before any other data EEPROM operation can occur. If second active page and call the pack routine to the routine determines that program memory has not permit the refresh to complete. been initialized for emulation, it will find the first allo- • If more than two active pages are found, the cated page of program memory and initialize its status routine assumes program memory has been information. Afterwards, the read and write functions corrupted by the application code and sets the may be called as needed. pageCorrupt flag. The routine may also determine whether data It is important to monitor the page status bits as well as EEPROM emulation is already underway. If so, one of the RCON and NVMCON (PIC24/dsPIC33F) or three scenarios may occur: EECON1 (PIC18) registers. By doing so, the applica- • If only one active page is found, the routine tion can respond appropriately to Resets and supply assumes a Reset occurred. No action is taken voltage changes. and the routine exits normally. Any read or write For a flowchart of the initialization routine, see Figure 1. operation that may have been active during the Reset should be repeated. FIGURE 1: EMULATION DATA EEPROM INITIALIZATION Find an Available Page Are all pages Y Set expiredPage Return expired? Status Flag N Count Number of Active Pages Are no active Y Erase First Mark First Page as pages found? Allocated Page of Active and Assign E/W Return Program Memory Count to 0 N Y Is 1 active page Return found? N Y Erase Are 2 active Pack First pages found? Second Return Active Page Active Page N Set pageCorrupt Status Flag Return DS01095A-page 6 © 2007 Microchip Technology Inc. AN1095 READ OPERATION The routine then searches for the active page. Once located, the active page is searched for an address The DataEERead function is used to retrieve data match, starting from the last location in the page. For EEPROM information. It returns the data associated details on how data EEPROM information is stored in with the data EEPROM address. If the provided program memory, see Table 1 and Table 2. address is equal to or greater than the amount of Since the page is filled sequentially, the latest data defined data EEPROM, the illegalAddress flag is set EEPROM information will be the first location found and a value of all ‘1’s is returned. This return value with the reverse search. Once found, the routine mimics the response of dedicated data EEPROM returns the data EEPROM data value associated with where an unwritten address returns an erased value. the data EEPROM address. If an active page is not found, the pageCorrupt flag is set. For a flowchart of the read operation, see Figure 2. FIGURE 2: READ OPERATION N Set illegalAddress Is data EEPROM Return address valid? Status Flag Y N Set pageCorrupt Return 0xFF or Is active page found? Status Flag 0xFFFF Y Set Table Pointer to End of Current Page Does Y Return Data data EEPROM address EEPROM Data match? N Y Set addrNotFound Return 0xFF or Has entire page been read? Status Flag 0xFFFF N Decrement Table Pointer © 2007 Microchip Technology Inc. DS01095A-page 7 AN1095 WRITE OPERATION FIGURE 3: WRITE OPERATION To write emulated data EEPROM, the application uses the DataEEWrite function. Like the read function, it Is N data EEPROM Set illegalAddress verifies that the data EEPROM address is between 0 Status Flag address valid? and one less than the size of the emulated data EEPROM. If an unimplemented address is supplied, the illegalAddress flag is set and write operation is Y Return aborted. The routine then searches for the active page. After the Is active page Y Set packBeforeInit active page is located, a read operation is performed. found? Status Flag To minimize the number of erase/write cycles, the value is programmed only if it has changed. N Return If an active page is not found, the pageCorrupt flag is set and a nonzero value is returned. Set Table Pointer to Start of Current Page A forward search of the active page returns the offset for the next available address. If the next available address is equal or greater than the last address in the Read Current Data EEPROM Value page, the packSkipped flag is set and the write opera- tion is aborted. Otherwise, the data EEPROM information is written to the next available address in Did the page. N data EEPROM Return If the information does not verify, the writeError flag is value change? set and a nonzero value is returned. The user can attempt to rewrite the data or respond as needed. Y The algorithm is designed to maintain at least one Find Next Available available location in the active page for the next write Address in Page operation. After a successful verification of the write operation, the pack routine is called if no available locations remain. After the routine completes successfully, a zero value is Y Set packSkipped returned. Is page full? Status Flag For a flowchart of the write operation, see Figure 3. N Return Write and Verify Data EEPROM Address and Data Does data N Set writeError verify? Status Flag Y Return Find Next Available Address in Page Y Is page full? Pack Active Page N Return DS01095A-page 8 © 2007 Microchip Technology Inc. AN1095 PACK OPERATION Since the number of pages of program memory and the erase/write limits are defined at compile time, all pages The pack routine, PackEE, is called from either a will expire sequentially. A search of every defined data DataEEWrite, after the current page is filled, or by EEPROM address is made into the active page using DataEEInit, to initialize program memory for data the read function. This information is written into the EEPROM emulation. It can also be called by the user, program memory write latches. After a row of write which may benefit timing-sensitive applications. latches is filled, the data is programmed until all infor- Because the routine performs multiple Flash opera- mation is stored into the packed array. If the last row is tions which stall the CPU, it can be executed at a time not full, the remaining write latches are written to all ‘1’s more convenient for the application. The disadvantage prior to programming. in doing so is that effective endurance is reduced since If the active page is not full, it is assumed the routine unwritten program memory locations are spent. was called by the user. At this point, the The function begins by reading the Page Current status packBeforePageFull status flag is set and the routine bit, for each page of program memory allocated, for continues into the programming portion. emulation to find the filled page. If it is not be found, the After all of the data has been programmed into the routine assumes that the pack function was packed page, the current page data is read and com- called prior to initializing program memory. The pared to the packed page data. If a mismatch occurs, packBeforeInit flag is then set and the operation is the writeError flag is set and the function exits with an aborted. error code. The page status information is also A new page is needed to program the latest data programmed and verified. If the verify routine is EEPROM information. This page is referred to as the successful, the active page is erased and the packed packed page. It always tries to assign the next page in page is designated as the new active page. program memory as the packed page. If all of the avail- A zero return value from the pack function indicates the able pages have reached the user-specified erase/ routine completed normally. write limit, the expiredPage flag is set and the routine will continue the pack operation. For a flowchart of the pack operation, see Figure 4. The erase/write counter is only incremented when the Note: The maximum data EEPROM size must packed page rolls around to be the first page allocated be no greater than 255. for data EEPROM memory. At this point, every page has the same number of erase/write cycles. If the erase/write counter exceeds the specified limit, the page status is marked as expired by programming the Page Expired bit in the Page Status register. © 2007 Microchip Technology Inc. DS01095A-page 9 AN1095 FIGURE 4: PACK OPERATION Load Most Current Data Find the Active Page EEPROM Information into Write Latches, Skipping Unwritten Addresses All N Increment N data EEPROM Data EEPROM Is active page Set packBeforeInit addresses Status Flag read? Address found? Y Y Return Program Data EEPROM Information Find an Available Page into Packed Page for Pack Operation Does N Set Page programmed writeError Is a packed N data verify? Status Flag Set expiredPage page available? Status Flag Y Return Y Program Page Status Return into Packed Page Set Table Pointer to Start of Packed Page Set Page N Does programmed writeError data verify? Status Flag Y N Set Return Is packed page packBeforePageFull full? Erase Active Page and Status Flag Mark Page as Not Active and Not Expired Y Return Update Status Write ‘1’s over Page Status of Packed Page to Register(s) Active Page Return DS01095A-page 10 © 2007 Microchip Technology Inc. AN1095 PERFORMANCE Based on the discussion to this point, a simplified equation (see Equation 1) can be made for total effec- tive endurance. Refer to the “Definition of Terms” Effective Endurance section for more information on the terms. Determining effective endurance is not a trivial Working through an example for the calculation since it is dependent on many factors. PIC24FJ128GA010, this device has a 512 word page. Traditionally, endurance is defined as how many times The 16-bit algorithm reserves one location for page a single address can be safely written. This definition status. doesn’t apply to emulated data EEPROM for a few different reasons. Equation 2 shows the calculation for two pages of pro- gram memory, 10 locations of emulated data EEPROM First, writing a data EEPROM address five times does and the typical endurance limit. not mean five erase/write cycles of endurance were consumed. From the perspective of the program mem- An average effective endurance can be calculated by ory, five writes were made to five different program dividing the total effective endurance by the size of the memory addresses. These five writes will not cost any emulated data EEPROM, but this does not tell the additional endurance cycles until the page is filled and whole story. It assumes that every data EEPROM the pack routine is called. address is updated at the same rate. In most applica- tions, this is not true. Some data, such as calibration Second, calculating effective endurance is more than data or user information, may be rarely updated while simply multiplying program memory page size and the sensor information can be written more frequently. size of the emulated data EEPROM. The entire page is Addresses written more often will consume a greater not available for emulation. Page status information is amount of program memory endurance. Therefore, stored in the beginning of the page, which is either one how writes are distributed across the data EEPROM location of program memory for the 16-bit algorithm or addresses significantly affects effective endurance. two for 8-bit. In addition, more locations will be con- Ratios could be assigned to each address to create a sumed after the pack routine depending on how many more accurate calculation but this is still only an data EEPROM addresses were written. As a result, approximation. It is difficult to predict how often each writing an address once has a significant impact to address will be written during an application’s lifetime. endurance since one less location is available after the array is packed. EQUATION 1: Total Effective Endurance = (Page Size – Page Status Size – Data EEPROM Size) * Number of Pages * Endurance EQUATION 2: Total Effective Endurance = (512 – 1 – 10) * 2 * 1000 = 1,002,000 cycles © 2007 Microchip Technology Inc. DS01095A-page 11 AN1095 CPU Stall Note: For PIC18FXXJ and PIC24F devices, the During program memory operations, the CPU stalls last page of program memory stores the until the write operation is complete. The algorithm per- Configuration Word information. It can not forms a program memory write operation in the be allocated for data EEPROM emulation. DataEEWrite routine. When that routine is called, the Code size and data memory requirements are not CPU stall time will depend on whether the page is filled. significantly affected by the size of the emulated data EEPROM. If the write operation does not fill the page, the stall time will be shorter – approximately the amount of time to These algorithms are designed to be configurable, not program one word. If the write operation fills the current only for different devices, but also for specific page, the delay will be longer. This is because the pack endurance needs (see Equation 1 and Equation 2). routine may perform multiple row program operations If greater endurance is needed, more pages can be on the packed page and an erase operation on the allocated to program memory. Alternatively, the erase/ active page. write limit can be set to the typical endurance rating instead of the minimum. These options are selected by The GetNextAvailCount function can be used to simply changing constants in the associated include determine how full the current page is and how many file. writes can be made before the pack routine is invoked. This function returns the offset of the next available address in the current page. The range of values is PIC18 Emulation Checklist between 2 and Page Size times two. The pack routine Make the following changes to the NoFilDee.inc can be called before the current page is full, if desired. file. Refer to the product data sheet for information on It can be helpful to perform a pack operation program memory. prematurely to minimize the impact of a CPU stall time 1. Specify emulation page start address in Note: For more information on program memory EMULATION_PAGES_START_ADDRESS. operation timings, refer to the applicable 2. Specify the number of program memory pages product data sheet. in NUM_DATA_EE_PAGES. The minimum is two pages. A compile-time error APPLICATION will generate if fewer than two pages are defined. To implement the data EEPROM emulation for an 3. Specify the amount of data EEPROM needed in application, use the appropriate checklist given in DATA_EE_SIZE. the sections “PIC18 Emulation Checklist” or “PIC24/dsPIC33F Emulation Checklist”. The maximum is 255 (0xFE). A compile-time error will generate if the data EEPROM size Both the 8 and 16-bit algorithms requires approxi- exceeds 255. mately 2.7 Kbytes of program memory for software. 4. Verify the ERASE, PROGRAM_ROW and This total does not include the amount of program PROGRAM_WORD opcode values. memory reserved for data EEPROM information. They also require approximately 82 bytes of data memory. 5. Specify the minimum page erase size (in instruc- The MPLAB® C30 C compiler used optimization level tions) in NUMBER_OF_INSTRUCTIONS_IN_PAGE “s” to minimize code size, although other settings can (512 typical). be used. 6. Specify the maximum programming size (in instruc- tions) in NUMBER_OF_INSTRUCTIONS_IN_ROW Program memory for storing data EEPROM (64 typical). information is allocated using a two-dimensional array. The array size is dependent on the page erase size of 7. Select the maximum erase/write cycle count per the device and the number of pages reserved for location in ERASE_WRITE_CYCLE_MAX. The emulation. For the 16-bit implementation, the compiler maximum is 65,535. A compile-time error will automatically aligns the array to the beginning of the generate if the limit is exceeded. next available page of program memory at compile 8. Add a function call to DataEEInit prior to any time. For the 8-bit version, the user must specify the other operation to emulated data EEPROM. starting address for an available page. A compile-time 9. Add the following files to your project: error will generate if this address does not align with a • DEE Emulation 8-bit.c page boundary. The array is used to determine • GenericTypeDefs.h program memory addresses for table operations. A compile-time error will be generated if the required • DEE Emulation 8-bit.h amount of program memory is not available. • NoFilDee.asm • NoFilDee.inc DS01095A-page 12 © 2007 Microchip Technology Inc. AN1095 PIC24/dsPIC33F Emulation Checklist CONCLUSION Make the following changes to DEE Emulation Emulated data EEPROM is an effective solution for 16-bit.h. Refer to product data sheet for information cost-sensitive applications that require high- on program memory. endurance, nonvolatile data memory. Applications 1. Specify the number of program memory pages suited for Microchip Technology’s cost-effective in NUM_DATA_EE_PAGES. 0.25 μm PIC devices can employ unused program memory and increase nonvolatile data endurance by a The minimum is two pages. A compile-time error factor in excess of 500. This “effective endurance” can will generate if fewer than two pages are defined. be customized by selecting the number of program 2. Specify the amount of data EEPROM needed in memory pages, size of emulated data EEPROM and DATA_EE_SIZE. the erase/write limit. This flexible algorithm will enable The maximum is 255 (0xFE). A compile-time you to add high-endurance data EEPROM to error will generate if the data EEPROM size your applications. exceeds 255. 3. Verify the ERASE, PROGRAM_ROW and PROGRAM_WORD opcode values. 4. Specify the minimum page erase size (in instruc- tions) in NUMBER_OF_INSTRUCTIONS_IN_PAGE (512 typical). 5. Specify the maximum programming size (in instruc- tions) in NUMBER_OF_INSTRUCTIONS_IN_ROW (64 typical). 6. Select the maximum erase/write cycle count in ERASE_WRITE_CYCLE_MAX. The maximum is 65,535. A compile-time error will generate if the limit is exceeded. 7. Add a function call to DataEEInit prior to any other operation to emulated data EEPROM. 8. Add the following files to your project: • DEE Emulation 16-bit.c SOFTWARE The tools and versions used to create both the PIC24/ dsPIC33F and PIC18 solutions are listed in Table 9. Later versions of the tools will also work, but should be tested for compatibility with any application. TABLE 9: TOOLS USED FOR SOLUTIONS Tool Version MPLAB® IDE 7.51 MPLAB C30 C Compiler 2.01 MPLAB C18 C Compiler 3.02 The latest source code and development tools are available on Microchip Technology’s web site (www.microchip.com). For the latest information on this application note, read the associated README file included with the software. © 2007 Microchip Technology Inc. DS01095A-page 13 AN1095 NOTES: DS01095A-page 14 © 2007 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device Trademarks applications and the like is provided only for your convenience The Microchip name and logo, the Microchip logo, Accuron, and may be superseded by updates. It is your responsibility to dsPIC, KEELOQ, KEELOQ logo, microID, MPLAB, PIC, ensure that your application meets with your specifications. PICmicro, PICSTART, PRO MATE, rfPIC and SmartShunt are MICROCHIP MAKES NO REPRESENTATIONS OR registered trademarks of Microchip Technology Incorporated WARRANTIES OF ANY KIND WHETHER EXPRESS OR in the U.S.A. and other countries. IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, AmpLab, FilterLab, Linear Active Thermistor, Migratable INCLUDING BUT NOT LIMITED TO ITS CONDITION, Memory, MXDEV, MXLAB, SEEVAL, SmartSensor and The QUALITY, PERFORMANCE, MERCHANTABILITY OR Embedded Control Solutions Company are registered FITNESS FOR PURPOSE. Microchip disclaims all liability trademarks of Microchip Technology Incorporated in the arising from this information and its use. Use of Microchip U.S.A. devices in life support and/or safety applications is entirely at Analog-for-the-Digital Age, Application Maestro, CodeGuard, the buyer’s risk, and the buyer agrees to defend, indemnify and dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, hold harmless Microchip from any and all damages, claims, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, suits, or expenses resulting from such use. No licenses are In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi, conveyed, implicitly or otherwise, under any Microchip MPASM, MPLAB Certified logo, MPLIB, MPLINK, PICkit, intellectual property rights. PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2007, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. © 2007 Microchip Technology Inc. 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